[LTP] [PATCH v8] high_freq_hwp_cap_cppc.c: new test
Piotr Kubaj
piotr.kubaj@intel.com
Thu Apr 30 13:07:56 CEST 2026
Verify for all online logical CPUs that their highest performance value are
the same for HWP Capability MSR 0x771 and CPPC sysfs file.
Signed-off-by: Piotr Kubaj <piotr.kubaj@intel.com>
---
Moved path string outside of the loop, per Andrea's review.
"online" sysfs node is only available for CPUs other than cpu0.
runtest/power_management_tests | 1 +
testcases/kernel/power_management/.gitignore | 1 +
.../power_management/high_freq_hwp_cap_cppc.c | 86 +++++++++++++++++++
3 files changed, 88 insertions(+)
create mode 100644 testcases/kernel/power_management/.gitignore
create mode 100644 testcases/kernel/power_management/high_freq_hwp_cap_cppc.c
diff --git a/runtest/power_management_tests b/runtest/power_management_tests
index b670da6ec..4da57ee72 100644
--- a/runtest/power_management_tests
+++ b/runtest/power_management_tests
@@ -1,4 +1,5 @@
#POWER_MANAGEMENT
+high_freq_hwp_cap_cppc high_freq_hwp_cap_cppc
runpwtests03 runpwtests03.sh
runpwtests04 runpwtests04.sh
runpwtests06 runpwtests06.sh
diff --git a/testcases/kernel/power_management/.gitignore b/testcases/kernel/power_management/.gitignore
new file mode 100644
index 000000000..03f0c83e4
--- /dev/null
+++ b/testcases/kernel/power_management/.gitignore
@@ -0,0 +1 @@
+high_freq_hwp_cap_cppc
diff --git a/testcases/kernel/power_management/high_freq_hwp_cap_cppc.c b/testcases/kernel/power_management/high_freq_hwp_cap_cppc.c
new file mode 100644
index 000000000..fb1b8edc7
--- /dev/null
+++ b/testcases/kernel/power_management/high_freq_hwp_cap_cppc.c
@@ -0,0 +1,86 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Copyright (C) 2026 Piotr Kubaj <piotr.kubaj@intel.com>
+ */
+
+/*\
+ * Verify for all online logical CPUs that their highest performance value are
+ * the same for HWP Capability MSR 0x771 and CPPC sysfs file.
+ */
+
+#include "tst_test.h"
+#include "tst_safe_prw.h"
+
+#define MSR_HWP_CAPABILITIES 0x771
+#define HIGHEST_PERF_MASK 0xFF
+
+static int nproc;
+
+static void setup(void)
+{
+ nproc = tst_ncpus_conf();
+}
+
+static void run(void)
+{
+ bool status = true;
+ char path[PATH_MAX];
+
+ for (int i = 0; i < nproc; i++) {
+ int online = 1;
+ unsigned long long msr_highest_perf = 0, sysfs_highest_perf = 0;
+
+ snprintf(path, sizeof(path), "/sys/devices/system/cpu/cpu%d/online", i);
+ if (i)
+ SAFE_FILE_SCANF(path, "%d", &online);
+
+ if (!online) {
+ tst_res(TINFO, "CPU%d offline, skipping", i);
+ continue;
+ }
+
+ snprintf(path, sizeof(path), "/sys/devices/system/cpu/cpu%d/acpi_cppc/highest_perf", i);
+ if (access(path, F_OK) == -1) {
+ tst_res(TCONF | TERRNO, "CPPC sysfs not available, skipping");
+ return;
+ }
+
+ SAFE_FILE_SCANF(path, "%llu", &sysfs_highest_perf);
+ tst_res(TDEBUG, "%s: %llu", path, sysfs_highest_perf);
+
+ snprintf(path, sizeof(path), "/dev/cpu/%d/msr", i);
+ int fd = SAFE_OPEN(path, O_RDONLY);
+
+ SAFE_PREAD(1, fd, &msr_highest_perf, sizeof(msr_highest_perf), MSR_HWP_CAPABILITIES);
+ SAFE_CLOSE(fd);
+ msr_highest_perf &= HIGHEST_PERF_MASK;
+ tst_res(TDEBUG, "%s: %llu", path, msr_highest_perf);
+
+ if (msr_highest_perf != sysfs_highest_perf) {
+ tst_res(TINFO, "cpu%d: sysfs=%llu MSR=%llu",
+ i, sysfs_highest_perf, msr_highest_perf);
+ status = false;
+ }
+ }
+
+ if (status)
+ tst_res(TPASS, "Sysfs and MSR values are equal");
+ else
+ tst_res(TFAIL, "Highest performance values differ between sysfs and MSR");
+}
+
+static struct tst_test test = {
+ .needs_kconfigs = (const char *const []) {
+ "CONFIG_ACPI_CPPC_LIB",
+ "CONFIG_X86_MSR",
+ NULL
+ },
+ .needs_root = 1,
+ .setup = setup,
+ .supported_archs = (const char *const []) {
+ "x86",
+ "x86_64",
+ NULL
+ },
+ .test_all = run
+};
--
2.47.3
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