5c080 timer understood.

[Oleg Gusev]

 The problem with the timer at 5c080 is resolved. An interesting 
  implication is that the bootloader must disable the busmaster
  access to DRAM. Otherwise, if the kernel is loaded at the 
  bottom of the memory, it will be (can be) overwritten by the 
  unified framebuffer code or USB.
  The description from the OHCI manual is given below.

   Oleg.

(HCCA) = 0xc005c000

4.4 Host Controller Communications Area 
The Host Controller Communications Area (HCCA) is a 256-byte structure of 
system memory that is used by system software to send and receive specific 
control and status information to and from the HC. This structure must be 
located on a 256-byte boundary. System software must write the address of 
this structure in HcHCCA in the HC.

4.4.1 Host Controller Communications Area Format 
Offset Size (bytes) 
 0x80              2 HccaFrameNumber
Contains the current frame number. This value is updated by the HC before it 
begins processing the periodic lists for the frame. 

4.4.2.2 HccaFrameNumber 
This 16-bit value is updated by the Host Controller on each frame. This value 
is written with the StartingFrame field of HcFmNumber after the Host 
Controller has sent an SOF and before the Host Controller reads an ED for 
processing in the new frame. The Host Controller transfers no data on USB 
between the time it sends an SOF and the time it updates this memory 
location.